US 12,271,608 B2
Data accumulation
Dominic Hugo Symes, Cambridgeshire (GB); John Wakefield Brothers, III, Calistoga, CA (US); Jens Olson, San Jose, CA (US); and Peter Mattias Hansson, Skåne (SE)
Assigned to Arm Limited, Cambridge (GB)
Filed by Arm Limited, Cambridge (GB)
Filed on Jan. 20, 2023, as Appl. No. 18/099,627.
Prior Publication US 2024/0248621 A1, Jul. 25, 2024
Int. Cl. G06F 3/06 (2006.01); G06F 7/52 (2006.01)
CPC G06F 3/0626 (2013.01) [G06F 3/0644 (2013.01); G06F 3/0673 (2013.01); G06F 7/52 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A processor to:
obtain at least one set of first input data;
divide each of the at least one set of first input data into at least a first bit range and a second bit range, higher than the first bit range;
generate accumulated data, wherein to generate the accumulated data comprises, for each operation cycle of at least one operation cycle:
performing an operation on the first bit range of a respective set of the at least one set of first input data to generate a set of operation data; and
accumulating the set of operation data with stored data within a first storage device;
accumulate a lowest n bits of the accumulated data with first further stored data within a first storage bit range of a second storage device;
bit-shift the lowest n bits of the accumulated data from the first storage device, thereby updating the stored data within the first storage device;
generate further accumulated data, wherein to generate the further accumulated data comprises, for each operation cycle of a further at least one operation cycle after the at least one operation cycle:
performing the operation on the second bit range of a respective set of the at least one set of first input data to generate a further set of operation data; and
accumulating the further set of operation data with the stored data within the first storage device; and
accumulate a lowest m bits of the further accumulated data with second further stored data within a second storage bit range of the second storage device, higher than the first storage bit range of the second storage device.