US 12,271,602 B2
Memory system and operation method of the memory system
Kyu Min Lee, Icheon (KR); and In Jong Jang, Icheon (KR)
Assigned to SK hynix Inc., Icheon (KR)
Filed by SK hynix Inc., Icheon (KR)
Filed on Sep. 27, 2023, as Appl. No. 18/476,145.
Application 18/476,145 is a continuation of application No. 17/730,121, filed on Apr. 26, 2022, granted, now 11,822,794.
Claims priority of application No. 10-2021-0155883 (KR), filed on Nov. 12, 2021.
Prior Publication US 2024/0020026 A1, Jan. 18, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0619 (2013.01) [G06F 3/0653 (2013.01); G06F 3/0679 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory system comprising:
a storage device configured to store data;
a system memory in which normal firmware and debugging firmware are stored;
a firmware implementer configured to receive the normal firmware or the debugging firmware from the system memory; and
a controller configured to perform a debugging operation on the storage device by executing the debugging firmware uploaded to the firmware implementer,
wherein, when an error detected in a normal mode is uncorrectable, the debugging firmware stored in the system memory is uploaded to the firmware implementer to change the normal mode to a debugging mode.