| CPC G06F 3/0619 (2013.01) [G06F 3/064 (2013.01); G06F 3/0679 (2013.01)] | 12 Claims |

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1. A memory system connectable to a host device, comprising:
a non-volatile memory including a plurality of blocks each having a plurality of memory cells and capable of having data written in a first mode and in a second mode, the first mode being a mode in which data of a first number of bits is written in each memory cell, the second mode being a mode in which data of a second number of bits is written in each memory cell, the second number being larger than the first number; and
a controller electrically connected to the non-volatile memory and configured to:
assign a first plurality of blocks among the plurality of blocks to a first area;
assign a second plurality of blocks, different from the first plurality of blocks, among the plurality of blocks to a second area;
assign a third plurality of blocks, different from the first plurality of blocks and the second plurality of blocks, among the plurality of blocks to a third area;
set the first mode to be used for each block assigned to the first area;
set the second mode to be used for each block assigned to the second area;
set one of the first mode or the second mode to be used for each block assigned to the third area;
allow the host device to designate a write destination area out of the first area and the third area;
write data received from the host device to an area that corresponds to the write designation area;
generate free blocks among the first plurality of blocks by transcribing valid data written to the first area to the second area; and
generate free blocks among the third plurality of blocks by transcribing valid data written to the third area to the second area.
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