US 12,271,513 B2
Assuring integrity and secure erasure of critical security parameters
Walter Andrew Hubis, Westminster, CO (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 12, 2023, as Appl. No. 18/208,585.
Application 18/208,585 is a division of application No. 17/116,760, filed on Dec. 9, 2020, granted, now 11,714,925.
Prior Publication US 2023/0325541 A1, Oct. 12, 2023
Int. Cl. G06F 21/79 (2013.01); G06F 21/57 (2013.01); G06F 21/60 (2013.01); G11C 16/34 (2006.01)
CPC G06F 21/79 (2013.01) [G06F 21/572 (2013.01); G06F 21/602 (2013.01); G11C 16/3472 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device coupled to the memory device, the processing device configured to perform operations comprising:
preparing a buffer with critical security parameter update data for updating one of more critical security parameters of the memory device, the one or more critical security parameters comprising at least one cryptographic key or at least one access credential, the critical security parameter update data comprising the one or more critical security parameters, a sequence number, and a security version, the preparing of the buffer comprising writing the one or more critical security parameters to the buffer;
computing a hash based on the one or more security parameters, the sequence number, and the security version;
writing the hash to the buffer;
writing the buffer to an inactive critical security parameter file; and
erasing an active critical security parameter file based on the buffer being successfully written to the inactive critical security parameter file.