US 12,271,319 B2
Data stored or free space based FIFO buffer
Yanjie Pan, Shanghai (CN); Yong Jiang, Shanghai (CN); Yuanyuan Li, Shanghai (CN); and Yong Zhang, Hillsboro, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Appl. No. 17/054,762
Filed by Intel Corporation, Santa Clara, CA (US)
PCT Filed Sep. 27, 2018, PCT No. PCT/CN2018/107896
§ 371(c)(1), (2) Date Nov. 11, 2020,
PCT Pub. No. WO2020/061888, PCT Pub. Date Apr. 2, 2020.
Prior Publication US 2021/0248087 A1, Aug. 12, 2021
Int. Cl. G06F 12/123 (2016.01); G06F 5/06 (2006.01); G06F 5/12 (2006.01); G06F 12/0893 (2016.01)
CPC G06F 12/123 (2013.01) [G06F 5/06 (2013.01); G06F 5/12 (2013.01); G06F 12/0893 (2013.01); G06F 2212/1044 (2013.01)] 7 Claims
OG exemplary drawing
 
1. Communication circuitry comprising:
radiofrequency (RF) circuitry coupled to an antenna array; and
baseband circuitry communicatively coupled with the RF circuitry, wherein the baseband circuitry is operable to:
obtain a quantized data sample;
determine an occupancy of a first in first out (FIFO) buffer;
select a first quantization precision of the quantized data sample to be stored in the FIFO buffer based on a first occupancy of the FIFO buffer;
select a second quantization precision of the quantized data sample based on the occupancy of the FIFO buffer being greater than the first occupancy;
if the first quantization precision is selected, then store the quantized data sample in the FIFO buffer; and
if the second quantization precision is selected, then:
store a selected number of bits of the quantized data sample in the FIFO buffer; and
discard a remaining number of bits of the quantized data sample that are not the selected number of bits.