| CPC G06F 12/023 (2013.01) [G06F 3/0619 (2013.01); G06F 3/0655 (2013.01); G06F 3/0679 (2013.01); G06F 2212/251 (2013.01)] | 16 Claims |

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1. An information processing device comprising:
a processor configured to execute a test operation related to evaluation of data integrity of data written in a memory system; and
a memory, wherein
the processor is configured to
store, in the memory, first write data to be written to a storage area of the memory system,
embed a zone identifier for uniquely identifying a zone including a plurality of consecutive logical addresses, and a sequence number for each logical address in a head or an end of a sector of the first write data stored in the memory,
issue, to the memory system, a zone append command for designating a head logical address of the zone and a size of the first write data, instead of designating a logical address corresponding to a storage location of the storage area to which the first write data is written, and requesting writing of the first write data to the storage area corresponding to the zone,
acquire, after a completion response corresponding to the zone append command is received, a first logical address corresponding to the storage location to which the first write data is written, and
store the zone identifier and the sequence number in a first expected value table storing expected values of read data corresponding to the zone for each logical address as first expected values to be used to evaluate data integrity of read data that is read from the storage location corresponding to the first logical address.
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