US 12,271,259 B2
Out-of-bounds recovery circuit
Ashish Darbari, Abbots Langley (GB); and Iain Singleton, Hemel Hempstead (GB)
Assigned to Imagination Technologies Limited, Kings Langley (GB)
Filed by Imagination Technologies Limited, Kings Langley (GB)
Filed on Feb. 27, 2023, as Appl. No. 18/114,963.
Application 18/114,963 is a continuation of application No. 17/338,538, filed on Jun. 3, 2021, granted, now 11,593,193, issued on Feb. 28, 2023.
Application 17/338,538 is a continuation of application No. 17/028,253, filed on Sep. 22, 2020, granted, now 11,030,039, issued on Jun. 8, 2021.
Application 17/028,253 is a continuation of application No. 15/784,746, filed on Oct. 16, 2017, granted, now 10,817,367, issued on Oct. 27, 2020.
Claims priority of application No. 1617530 (GB), filed on Oct. 14, 2016.
Prior Publication US 2023/0205621 A1, Jun. 29, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06F 21/52 (2013.01); G06F 30/30 (2020.01); G06F 30/392 (2020.01); G06F 115/10 (2020.01); G06F 117/06 (2020.01)
CPC G06F 11/0793 (2013.01) [G06F 11/073 (2013.01); G06F 11/0736 (2013.01); G06F 11/0754 (2013.01); G06F 21/52 (2013.01); G06F 30/30 (2020.01); G06F 30/392 (2020.01); G06F 2115/10 (2020.01); G06F 2117/06 (2020.01)] 20 Claims
OG exemplary drawing
 
1. An out-of-bounds recovery circuit for an electronic device, the out-of-bounds recovery circuit comprising:
detection logic configured to:
monitor one or more control and/or data signals of the electronic device; and
detect an out-of-bounds violation in the electronic device, when the detection logic determines, based on the one or more control and/or data signals of the electronic device, a processing element of the electronic device has fetched an instruction from a non-allowable memory address for a current operating state of the electronic device; and
transition logic configured to, in response to the detection logic detecting an out-of-bounds violation, cause the electronic device to transition to a predetermined safe state by (i) raising an interrupt, (ii) disabling one or more valid signals of the electronic device, and (iii) setting a current state of the processing element to an idle state.