US 12,271,172 B2
Solid state power controllers
John A. Dickey, Caledonia, IL (US)
Assigned to Hamilton Sundstrand Corporation, Charlotte, NC (US)
Filed by Hamilton Sundstrand Corporation, Charlotte, NC (US)
Filed on Dec. 7, 2021, as Appl. No. 17/544,720.
Prior Publication US 2023/0176538 A1, Jun. 8, 2023
Int. Cl. G05B 19/05 (2006.01); G05B 9/03 (2006.01); G06F 1/18 (2006.01); G06F 1/26 (2006.01); G06F 11/16 (2006.01); G06F 11/20 (2006.01)
CPC G05B 19/054 (2013.01) [G05B 19/058 (2013.01); G05B 9/03 (2013.01); G06F 1/189 (2013.01); G06F 1/26 (2013.01); G06F 1/266 (2013.01); G06F 11/1629 (2013.01); G06F 11/2028 (2013.01); G06F 11/2038 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a main board;
two or more redundant central processing units (CPUs) operatively connected to the main board;
two or more control power sources operatively connected to provide power to at least one of the two or more redundant CPUs;
a logic module configured to provide redundant control source selection between the two or more redundant CPUs, the logic module comprising:
an exclusive OR (XOR) gate operatively connected between the two or more redundant CPUs and a gate driver, the XOR gate configured to receive signal outputs from the two or more redundant CPUs and generate a gate drive signal; and
a solid state power controller operatively connected to the two or more redundant CPUs through the XOR gate, the solid state power controller configured to provide power to a load based on the gate drive signal provided by the XOR gate.