US 11,950,468 B2
Display panel, method of manufacturing the same and display device
Yipeng Chen, Beijing (CN); Lujiang Huangfu, Beijing (CN); and Libin Liu, Beijing (CN)
Assigned to BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/762,975
Filed by BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Apr. 15, 2021, PCT No. PCT/CN2021/087370
§ 371(c)(1), (2) Date Mar. 23, 2022,
PCT Pub. No. WO2021/227760, PCT Pub. Date Nov. 18, 2021.
Claims priority of application No. 202010387359.4 (CN), filed on May 9, 2020.
Prior Publication US 2022/0336566 A1, Oct. 20, 2022
Int. Cl. H10K 59/131 (2023.01); G09G 3/3225 (2016.01); H10K 59/121 (2023.01); H10K 71/00 (2023.01); H10K 59/12 (2023.01); H10K 59/35 (2023.01)
CPC H10K 59/131 (2023.02) [G09G 3/3225 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 71/00 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/0465 (2013.01); G09G 2300/0842 (2013.01); H10K 59/1201 (2023.02); H10K 59/351 (2023.02)] 14 Claims
OG exemplary drawing
 
1. A display panel, comprising: a substrate, an initialization signal line layer and a first auxiliary signal line layer sequentially stacked on the substrate along a direction away from the substrate; and a plurality of sub-pixel areas arranged in an array, wherein the plurality of sub-pixel areas form a plurality of rows of sub-pixel areas arranged in sequence along a second direction, each row of sub-pixel areas includes a plurality of sub-pixel areas arranged along a first direction, the first direction and the second direction intersect;
the initialization signal line layer includes an initialization signal line pattern arranged in each of the plurality of sub-pixel areas;
the first auxiliary signal line layer includes a plurality of first auxiliary signal line patterns corresponding to the plurality of sub-pixel areas in a one-to-one manner, and the first auxiliary signal line pattern is coupled to an initialization signal line pattern in a corresponding sub-pixel area, at least part of the first auxiliary signal line pattern extends along the first direction, and first auxiliary signal line patterns corresponding to sub-pixel areas in a same row of sub-pixel areas are sequentially coupled,
the display panel further includes a transistor structure, the initialization signal line pattern and an active layer in the transistor structure are arranged at a same layer,
wherein the display panel further comprises: a conductive connection portion layer located on a side of the first auxiliary signal line layer away from the substrate, wherein the conductive connection portion layer includes second conductive connection portions corresponding to the plurality of the sub-pixel areas in a one-to-one manner; in the same sub-pixel area, there is a first overlapping area between an orthographic projection of the second conductive connection portion on the substrate and an orthographic projection of the initialization signal line pattern on the substrate, and there is a second overlapping area between the orthographic projection of the second conductive connection portion on the substrate and the first auxiliary signal line pattern, the second conductive connection portion is coupled to the initialization signal line pattern in the first overlapping area, and the second conductive connection portion is coupled to the first auxiliary signal line layer pattern in the second overlapping area,
wherein the first auxiliary signal line pattern includes a first portion and a second portion coupled to each other, and the first portion extends along the first direction, the second portion protrudes from the first portion along a direction perpendicular to the first direction; an orthographic projection of the first portion on the substrate overlaps the orthographic projection of the initialization signal line pattern on the substrate overlap, and an orthographic projection of the second portion on the substrate does not overlap the orthographic projection of the initialization signal line pattern on the substrate; in the same sub-pixel area, there is the second overlapping area between the orthographic projection of the second portion on the substrate and the orthographic projection of the second conductive connection portion on the substrate.
 
13. A method of manufacturing a display panel, wherein the display panel includes a plurality of sub-pixel areas arranged in an array, and the plurality of sub-pixel areas are formed as a plurality of rows of sub-pixel areas arranged in sequence along a second direction, each row of sub-pixel areas includes a plurality of sub-pixel areas arranged along a first direction, and the first direction intersects the second direction; the method includes:
forming an initialization signal line layer and a first auxiliary signal line layer that are stacked in sequence on the substrate along a direction away from the substrate;
the initialization signal line layer includes an initialization signal line pattern arranged in each of plurality of the sub-pixel areas;
the first auxiliary signal line layer includes a plurality of first auxiliary signal line patterns corresponding to the plurality of sub-pixel areas in a one-to-one manner, and the first auxiliary signal line pattern is coupled to the initialization signal line pattern in the corresponding sub-pixel area; at least part of the first auxiliary signal line pattern extends along the first direction, and in a same row of sub-pixel areas, the first auxiliary signal line patterns corresponding to the plurality of sub-pixel areas are sequentially coupled,
the display panel further includes a transistor structure, the initialization signal line pattern and an active layer in the transistor structure are arranged at a same layer,
wherein the display panel further comprises: a conductive connection portion layer located on a side of the first auxiliary signal line layer away from the substrate, wherein the conductive connection portion layer includes second conductive connection portions corresponding to the plurality of the sub-pixel areas in a one-to-one manner; in the same sub-pixel area, there is a first overlapping area between an orthographic projection of the second conductive connection portion on the substrate and an orthographic projection of the initialization signal line pattern on the substrate, and there is a second overlapping area between the orthographic projection of the second conductive connection portion on the substrate and the first auxiliary signal line pattern, the second conductive connection portion is coupled to the initialization signal line pattern in the first overlapping area, and the second conductive connection portion is coupled to the first auxiliary signal line layer pattern in the second overlapping area,
wherein the first auxiliary signal line pattern includes a first portion and a second portion coupled to each other, and the first portion extends along the first direction, the second portion protrudes from the first portion along a direction perpendicular to the first direction; an orthographic projection of the first portion on the substrate overlaps the orthographic projection of the initialization signal line pattern on the substrate overlap, and an orthographic projection of the second portion on the substrate does not overlap the orthographic projection of the initialization signal line pattern on the substrate; in the same sub-pixel area, there is the second overlapping area between the orthographic projection of the second portion on the substrate and the orthographic projection of the second conductive connection portion on the substrate.
 
14. A display panel, comprising: a substrate, an initialization signal line layer and a first auxiliary signal line layer sequentially stacked on the substrate along a direction away from the substrate; and a plurality of sub-pixel areas arranged in an array, wherein the plurality of sub-pixel areas form a plurality of rows of sub-pixel areas arranged in sequence along a second direction, each row of sub-pixel areas includes a plurality of sub-pixel areas arranged along a first direction, the first direction and the second direction intersect;
the initialization signal line layer includes an initialization signal line pattern arranged in each of the plurality of sub-pixel areas;
the first auxiliary signal line layer includes a plurality of first auxiliary signal line patterns corresponding to the plurality of sub-pixel areas in a one-to-one manner, and the first auxiliary signal line pattern is coupled to an initialization signal line pattern in a corresponding sub-pixel area, at least part of the first auxiliary signal line pattern extends along the first direction, and first auxiliary signal line patterns corresponding to sub-pixel areas in a same row of sub-pixel areas are sequentially coupled,
the display panel further includes a transistor structure, the initialization signal line pattern and an active layer in the transistor structure are arranged at a same layer,
wherein there is a third overlapping area between the orthographic projection of the first auxiliary signal line pattern on the substrate and the orthographic projection of the initialization signal line pattern on the substrate, the first auxiliary signal line pattern is directly coupled to the initialization signal line pattern through a via hole located in the third overlapping area,
wherein the first auxiliary signal line pattern includes a third portion and a fourth portion, the third portion extends along the first direction, in a direction perpendicular to the first direction, a width of the fourth portion is greater than a width of the third portion; there is the third overlapping area between an orthographic projection of the fourth portion on the substrate and the orthographic projection of the initialization signal line pattern on the substrate.