US 11,950,433 B2
Resistive random access memory device
Jheng-Hong Jiang, Hsinchu (TW); Cheung Cheng, Hsinchu (TW); and Chia-Wei Liu, Zhubei (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Aug. 9, 2022, as Appl. No. 17/884,014.
Application 17/884,014 is a continuation of application No. 17/242,068, filed on Apr. 27, 2021, granted, now 11,489,011.
Application 17/242,068 is a continuation of application No. 16/419,324, filed on May 22, 2019, granted, now 11,011,576.
Claims priority of provisional application 62/691,292, filed on Jun. 28, 2018.
Prior Publication US 2022/0384725 A1, Dec. 1, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H10N 70/00 (2023.01); G11C 13/00 (2006.01); H10B 63/00 (2023.01)
CPC H10B 63/20 (2023.02) [G11C 13/0026 (2013.01); G11C 13/0028 (2013.01); H10B 63/84 (2023.02); H10N 70/021 (2023.02); H10N 70/023 (2023.02); H10N 70/063 (2023.02); H10N 70/066 (2023.02); H10N 70/826 (2023.02); H10N 70/841 (2023.02); H10N 70/881 (2023.02); H10N 70/8833 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a first conductor extending substantially along a first axis;
a first selector material comprising a first portion that extends along a first sidewall of the first conductor;
a second selector material comprising a first portion that extends along the first sidewall of the first conductor; and
a first variable resistive material comprising a portion that extends along the first sidewall of the first conductor;
wherein the first portion of the first selector material, the first potion of the second selector material, and the portion of the first variable resistive material are stacked along a second axis substantially perpendicular to the first axis.