US 11,950,326 B2
Advanced feedback in sidelink
Sarun Selvanesan, Berlin (DE); Thomas Fehrenbach, Berlin (DE); Roya Ebrahim Rezagah, Berlin (DE); Cornelius Hellge, Berlin (DE); Thomas Wirth, Berlin (DE); Thomas Schierl, Berlin (DE); Robin Thomas, Berlin (DE); and Baris Göktepe, Berlin (DE)
Assigned to Koninklijke Philips N.V., Eindhoven (NL)
Filed by KONINKLIJKE PHILIPS N.V., Eindhoven (NL)
Filed on Jul. 8, 2021, as Appl. No. 17/370,647.
Application 17/370,647 is a continuation of application No. PCT/EP2020/050398, filed on Jan. 9, 2020.
Claims priority of application No. 19151273 (EP), filed on Jan. 10, 2019.
Prior Publication US 2021/0336728 A1, Oct. 28, 2021
Int. Cl. H04W 92/18 (2009.01); H04L 1/1829 (2023.01)
CPC H04W 92/18 (2013.01) [H04L 1/1854 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A device comprising:
a processor circuit and a memory circuit, wherein the memory is arranged to store instructions for the processor circuit,
wherein the processor circuit is arranged to communicate using a portion of a plurality of sidelink resources,
wherein the processor circuit is arranged to receive a sidelink feedback from a receiving device for a plurality of data transmissions,
wherein the sidelink feedback indicates a successful or non-successful reception by the receiving device,
wherein the processor circuit is arranged to bundle a plurality of sidelink feedbacks,
wherein the bundle is reported to a third device.