US 11,949,423 B2
Clock and data recovery device with pulse filter and operation method thereof
Mikhail Tamrazyan, Hsinchu (TW); Vinod Kumar Jain, Hsinchu (TW); and Prateek Kumar Goyal, Hsinchu (TW)
Assigned to Faraday Technology Corp., Hsinchu (TW)
Filed by Faraday Technology Corp., Hsinchu (TW)
Filed on Jun. 22, 2022, as Appl. No. 17/846,018.
Prior Publication US 2023/0421158 A1, Dec. 28, 2023
Int. Cl. H03L 7/18 (2006.01); H03L 7/08 (2006.01); H03L 7/087 (2006.01); H03L 7/099 (2006.01); H04L 7/00 (2006.01)
CPC H03L 7/0807 (2013.01) [H03L 7/087 (2013.01); H03L 7/099 (2013.01); H04L 7/0016 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A clock and data recovery device, comprising:
a first phase detector, receiving a data signal and a first output signal, and generating a first phase state signal according to the data signal and the first output signal;
a pulse filter, coupled to the first phase detector, adjusting a pulse width of the first phase state signal according to a capacitance of a loop capacitor to generate a filtered signal, wherein the pulse width of the pulse of the first phase state signal is positively proportional to the capacitance of the loop capacitor;
a charge pump, coupled to the phase detector, generating a pumping signal according to the filtered signal;
a loop filter, comprising the loop capacitor, generating a control signal according to the pumping signal; and
a voltage-controlled oscillator, generating a second output signal and adjusting a frequency of the second output signal according to the control signal, wherein the first output signal is generated according to the second output signal.