US 11,949,019 B2
Thin film semiconductor switching device
Douglas W. Barlage, Edmonton (CA); Lhing Gem Shoute, Edmonton (CA); Kenneth C. Cadien, Edmonton (CA); Alex Munnlick Ma, Edmonton (CA); and Eric Wilson Milburn, Edmonton (CA)
Assigned to ZINITE CORPORATION, British Columbia (CA)
Filed by ZINITE CORPORATION, Vancouver (CA)
Filed on Oct. 26, 2023, as Appl. No. 18/384,066.
Application 18/384,066 is a continuation of application No. PCT/IB2022/056349, filed on Jul. 8, 2022.
Claims priority of provisional application 63/221,292, filed on Jul. 13, 2021.
Prior Publication US 2024/0055529 A1, Feb. 15, 2024
Int. Cl. H01L 29/00 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/78618 (2013.01) [H01L 29/66969 (2013.01); H01L 29/78603 (2013.01); H01L 29/78642 (2013.01); H01L 29/7869 (2013.01)] 30 Claims
OG exemplary drawing
 
1. A vertical thin film transistor comprising:
a substantially planar substrate;
an insulating layer formed on the substrate;
a source formed on the insulating layer
a second insulating layer formed on the source, the second insulating layer forming a vertical well having an inner surface;
a source-channel interfacial member formed on the inner surface of the vertical well and the source;
an n-type semiconductor material formed on the source-channel interfacial member, such that the source is electrically connected to the n-type semiconductor material by the source-channel interfacial member;
a gate dielectric layer formed over the n-type semiconductor material;
a gate formed over the dielectric layer; and
a drain formed on the insulating layer and in electrical contact with the n-type semiconductor material, wherein when the transistor is in an on state current can flow from the source to the drain through the source-channel interfacial member and through a channel formed in the n-type semiconductor material.