US 11,948,930 B2
Semiconductor package and method of manufacturing the same
Chin-Chuan Chang, Zhudong Township (TW); Szu-Wei Lu, Hsinchu (TW); and Chen-Hua Yu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Nov. 13, 2020, as Appl. No. 17/097,579.
Claims priority of provisional application 63/017,024, filed on Apr. 29, 2020.
Prior Publication US 2021/0343693 A1, Nov. 4, 2021
Int. Cl. H01L 23/12 (2006.01); H01L 21/66 (2006.01); H01L 21/683 (2006.01); H01L 21/768 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01)
CPC H01L 25/50 (2013.01) [H01L 21/6836 (2013.01); H01L 21/76898 (2013.01); H01L 21/78 (2013.01); H01L 22/14 (2013.01); H01L 24/14 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 25/18 (2013.01); H01L 2221/68327 (2013.01); H01L 2224/14181 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/17181 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a set of through-vias in a wafer substrate, the set of through-vias partially penetrating a thickness of the wafer substrate;
forming first connectors over the set of through-vias on a first side of the wafer substrate, the first connectors having protruding portions protruding from the first side by a non-zero vertical distance;
burying the first connectors in a dielectric layer formed over the first side of the wafer substrate, the dielectric layer laterally surrounding the protruding portions of the first connectors and covering an upper surface of the first connectors;
attaching the first side of the wafer substrate to a carrier by the dielectric layer;
after attaching the first side of the wafer substrate to the carrier, thinning the wafer substrate to expose the set of through-vias;
after thinning the wafer substrate, forming second connectors over the set of through-vias on a second side of the wafer substrate, the second side opposite the first side;
after forming the second connectors, bonding a device die to the second connectors;
after bonding the device die to the second connectors, singulating the wafer substrate into multiple packages, each of the multiple packages including a portion of the wafer substrate and the device die;
mounting a first package of the multiple packages to another carrier;
forming a redistribution structure over the first package;
forming third connectors over the redistribution structure; and
singulating the first package and redistribution structure into an integrated fan out package.