US 11,948,494 B2
Driver chip and display device
Yajie Bai, Beijing (CN); Zhuo Xu, Beijing (CN); Jingpeng Zhao, Beijing (CN); and Wentao Zhu, Beijing (CN)
Assigned to Chongqing BOE Optoelectronics Technology Co., Ltd., Chongqing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/761,995
Filed by Chongqing BOE Optoelectronics Technology Co., Ltd., Chongqing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed May 17, 2021, PCT No. PCT/CN2021/094135
§ 371(c)(1), (2) Date Mar. 18, 2022,
PCT Pub. No. WO2021/238704, PCT Pub. Date Feb. 12, 2021.
Claims priority of application No. 202010452340.3 (CN), filed on May 26, 2020.
Prior Publication US 2022/0335877 A1, Oct. 20, 2022
Int. Cl. G09G 3/20 (2006.01)
CPC G09G 3/2092 (2013.01) [G09G 2300/0426 (2013.01); G09G 2354/00 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A driver chip, comprising: two opposite long edges, and two opposite short edges connected to the long edges, wherein the driver chip comprises: a plurality of output pins and a plurality of input pins;
the plurality of output pins are close to one of the long edges;
the plurality of input pins comprises: first input pins, second input pins and third input pins;
the first input pins are close to the other long edge opposite to the plurality of output pins;
the second input pins are close to the short edges; and
the third input pins are close to one of the long edges and arranged on both sides of the plurality of output pins;
wherein the driver further comprises: a plurality of gate drive signal input pins, and a plurality of gate drive signal output pins electrically connected to the gate drive signal input pins in a one-to-one corresponding mode;
wherein the gate drive signal input pins and the gate drive signal output pins are close to one of the long edges and arranged on both sides of the third input pins, respectively.