CPC G06F 30/3308 (2020.01) [G06F 8/41 (2013.01); G06F 8/70 (2013.01); G06F 11/3688 (2013.01); G06F 11/3696 (2013.01)] | 20 Claims |
1. A development system of an offline software-in-the-loop simulation, the development system comprising:
a database, comprising at least one chip peripheral library, the chip peripheral library comprising at least one processing program; and
a common firmware architecture, configured to generate a chip control program after being compiled, the common firmware architecture comprising:
an application layer, comprising a product program and a configuration header file, wherein the product program is configured to record a code of controlling a product related circuit, and the configuration header file is configured to connect the processing program required by a peripheral module; and
a hardware abstraction layer (HAL), comprising the processing program, wherein the application layer is configured to add the processing program from the database to the HAL correspondingly during compilation based on the peripheral module being controlled specifically by a physical chip or a circuit simulation software;
wherein the chip control program is configured to be executed in the physical chip or the circuit simulation software, and control the product related circuit through controlling the peripheral module.
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