US 12,268,106 B2
Nonvolatile memory device and operating method of the same
Minhyun Lee, Suwon-si (KR); Houk Jang, Cambridge, MA (US); Donhee Ham, Cambridge, MA (US); Chengye Liu, Cambridge, MA (US); Henry Hinton, Cambridge, MA (US); Haeryong Kim, Seongnam-si (KR); and Hyeonjin Shin, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR); and President and Fellows Of Harvard College, Cambridge, MA (US)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR); and President and Fellows Of Harvard College, Cambridge, MA (US)
Filed on Feb. 10, 2023, as Appl. No. 18/167,354.
Application 18/167,354 is a continuation of application No. 17/094,121, filed on Nov. 10, 2020, granted, now 11,600,774, issued on Mar. 7, 2023.
Claims priority of provisional application 62/937,850, filed on Nov. 20, 2019.
Claims priority of application No. 10-2020-0010030 (KR), filed on Jan. 28, 2020.
Prior Publication US 2023/0189673 A1, Jun. 15, 2023
Int. Cl. H10N 70/00 (2023.01); H10B 63/00 (2023.01)
CPC H10N 70/8836 (2023.02) [H10B 63/84 (2023.02); H10N 70/011 (2023.02); H10N 70/841 (2023.02); H10N 70/8845 (2023.02)] 11 Claims
OG exemplary drawing
 
1. A electronic device comprising:
a resistance switching layer having a resistance value, the resistance switching layer configured to change the resistance value based on an illumination of light irradiated thereto, and the resistance switching layer configured to maintain the changed resistance value;
a gate on the resistance switching layer;
a gate oxide layer between the resistance switching layer and the gate;
a source and a drain, spaced part from each other, on the resistance switching layer; and
a color filter arranged on the resistance switching layer,
wherein the resistance switching layer includes charge traps configured to trap charges in the resistance switching layer such that the change in the resistance value of the resistance switching layer generated by the illumination of the light is maintained after the illumination.