| CPC H10N 70/841 (2023.02) [H10N 70/011 (2023.02); H10N 70/24 (2023.02); H10N 70/826 (2023.02)] | 20 Claims |
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1. A method of forming a memory device, comprising:
forming a bottom electrode layer;
forming a data storage layer overlying the bottom electrode layer;
forming a top electrode layer overlying the data storage layer;
forming a masking layer overlying the top electrode layer;
subsequently forming a first hard mask layer and a second hard mask layer over the masking layer;
patterning the first hard mask layer, the second hard mask layer, the masking layer, and the top electrode layer to form a top electrode and a mask overlying the top electrode; and
performing an etching process on the first hard mask layer and the second hard mask layer to form a second hard mask structure separated from the mask by a first hard mask structure, wherein during the etching process, an etch rate of the first hard mask layer is higher than an etch rate of the second hard mask layer, and wherein a width of the first hard mask structure is less than a width of the second hard mask structure, and exposing a top surface of the mask.
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