US 12,268,030 B2
Self-aligned C-shaped vertical field effect transistor
Ruilong Xie, Niskayuna, NY (US); Robert Robison, Rexford, NY (US); Hemanth Jagannathan, Niskayuna, NY (US); and Jay William Strane, Warwick, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Sep. 2, 2021, as Appl. No. 17/446,784.
Prior Publication US 2023/0067119 A1, Mar. 2, 2023
Int. Cl. H01L 29/66 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 30/63 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01)
CPC H10D 84/834 (2025.01) [H10D 30/025 (2025.01); H10D 30/6219 (2025.01); H10D 30/63 (2025.01); H10D 84/0193 (2025.01); H10D 84/038 (2025.01)] 20 Claims
OG exemplary drawing
 
8. A semiconductor structure comprising:
a semiconductor substrate;
a first region and a second region on the semiconductor substrate, the first region being adjacent to the second region and separated from the second region by a first space, the first region and the second region having a first polarity;
a third region on the semiconductor substrate adjacent to the second region and separated from the second region by a second space, the third region having a second polarity that is different from the first polarity; and
a row of fin structures disposed on each of the first region, the second region and the third region, each fin structure in the row of fin structures including two adjacent vertical segments with rounded ends extending perpendicularly from an uppermost surface of the semiconductor substrate and a horizontal segment extending between and connecting the two adjacent vertical segments, wherein an opening is located between the two adjacent vertical segments on a side of the fin structure opposing the horizontal segment.