| CPC H10D 64/513 (2025.01) [H10B 12/053 (2023.02); H10B 12/34 (2023.02)] | 6 Claims |
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1. A method of manufacturing a semiconductor device, comprising:
forming a trench in a substrate;
disposing an upper gate electrode in the trench;
disposing a first dielectric layer on the upper gate electrode in the trench;
disposing a capping layer on the first dielectric layer in the trench;
disposing a material of the capping layer on the first dielectric layer; and
partially removing the material of the capping layer to expose a portion of the first dielectric layer.
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