a first semiconductor structure comprising a first substrate and circuit elements on the first substrate; and

a second semiconductor structure on the first semiconductor structure,

wherein the second semiconductor structure comprises:

a second substrate having a first region and a second region;

gate electrodes that are stacked and spaced apart from each other in a first direction that is perpendicular to an upper surface of the second substrate, wherein the gate electrodes extend in a second direction on the second region and have different lengths on the second region;

channel structures that penetrate the gate electrodes and extend in the first direction, wherein each of the channel structures comprises a conductive channel layer, and wherein the channel structures are on the first region;

support structures that penetrate the gate electrodes and extend in the first direction, wherein each of the support structures comprises a support insulating layer, and wherein the support structures are on the second region;

separation regions that penetrate the gate electrodes, extend in the second direction, and are spaced apart from each other in a third direction that is perpendicular to the first direction and the second direction;

a first horizontal conductive layer on the first region below the gate electrodes, wherein the first horizontal conductive layer is in contact with the channel layer of each of the channel structures; and

a horizontal insulating layer below the gate electrodes on a portion of the second region,

wherein the second substrate has recess regions below the separation regions in the second region, adjacent to the first region.