US 12,268,004 B2
Semiconductor devices with string select channel layer
Hyojoon Ryu, Hwaseong-si (KR); Younghwan Son, Hwaseong-si (KR); Seogoo Kang, Seoul (KR); Jesuk Moon, Hwaseong-si (KR); Junghoon Jun, Hwaseong-si (KR); Kohji Kanamori, Seongnam-si (KR); and Jeehoon Han, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jan. 30, 2023, as Appl. No. 18/103,070.
Application 18/103,070 is a continuation of application No. 16/942,456, filed on Jul. 29, 2020, granted, now 11,594,544.
Claims priority of application No. 10-2019-0145092 (KR), filed on Nov. 13, 2019.
Prior Publication US 2023/0180478 A1, Jun. 8, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H10B 43/35 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/40 (2023.01)
CPC H10B 43/35 (2023.02) [H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/40 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an alternating arrangement of gate layers and interlayer dielectric layers stacked on a substrate;
a channel structure vertically extending through the alternating arrangement of gate layers and interlayer dielectric layers;
a string select gate layer on the channel structure; and
a string select channel layer vertically extending through the string select gate layer to contact the channel structure, wherein:
the string select channel layer includes:
a first portion below the string select gate layer;
a second portion extending through the string select gate layer; and
a third portion above the string select gate layer,
each of the first portion and the third portion includes a protruding region,
the channel structure includes a channel layer and a channel pad inside an upper end of the channel layer, and
the first portion is spaced apart from the channel layer and contacts the channel pad.