US 12,268,000 B2
Memory device and method of fabricating the same
Chia-Tze Huang, Hsing-Chu (TW)
Assigned to MACRONIX International Co., Ltd., Hsinchu (TW)
Filed by MACRONIX International Co., Ltd., Hsinchu (TW)
Filed on Apr. 14, 2022, as Appl. No. 17/721,235.
Prior Publication US 2023/0337426 A1, Oct. 19, 2023
Int. Cl. H10B 43/27 (2023.01); H01L 23/528 (2006.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 43/10 (2023.01)
CPC H10B 43/27 (2023.02) [H01L 23/5283 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 43/10 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a gate stack structure, located over a dielectric substrate, wherein the gate stack structure comprises a plurality of gate layers and a plurality of insulating layers stacked alternately with each other;
a channel pillar extending through the gate stack structure;
a plurality of conductive pillars, wherein each of the conductive pillars comprises:
a body portion extending through the gate stack structure, wherein the body portion is electrically connected to the channel pillar; and
an extension portion below and connected to the body portion, wherein the extension portion is electrically isolated from the channel pillar; and
a charge storage structure between the channel pillar and the plurality of gate layers, wherein
a top surface and an upper sidewall of the extension portion are covered by the body portion.