US 12,267,994 B2
Method for manufacturing semiconductor device having diode connectedto memory device
Hsih-Yang Chiu, Taoyuan (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Mar. 29, 2022, as Appl. No. 17/707,445.
Prior Publication US 2023/0320064 A1, Oct. 5, 2023
Int. Cl. H10B 12/00 (2023.01); G11C 11/406 (2006.01)
CPC H10B 12/09 (2023.02) [G11C 11/40611 (2013.01); H10B 12/31 (2023.02); H10B 12/50 (2023.02)] 8 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor device, comprising:
providing a substrate, wherein the substrate comprises a first well region having a first conductive type;
forming a first gate structure on the substrate;
forming a first doped region in the substrate, wherein the first doped region has a second conductive type different from the first conductive type, and the first gate structure and the first doped region are included in a first transistor;
forming a capacitor structure electrically coupled to the first doped region of the substrate;
forming a second doped region in the substrate, wherein the second doped region has the second conductive type, the second doped region and the first well region collectively serve a diode, and the second doped region is electrically coupled to the first doped region;
forming a third doped region in the substrate, wherein the third doped region has the first conductive type, wherein the third doped region surrounds the second doped region; and
forming a fourth doped region in the substrate, wherein the fourth doped region has the second conductive type, wherein the fourth doped region surrounds the third doped region.