| CPC H04W 16/28 (2013.01) [H04W 72/0446 (2013.01); H04W 72/046 (2013.01)] | 5 Claims |

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1. A terminal comprising:
a receiver that receives a first configuration of a first control resource set (CORESET), a second configuration of a second CORESET, and a third configuration of a third CORESET; and
a processor that applies a value 0 to the first CORESET pool index when:
different values of CORESET pool indices are respectively configured in the second configuration and the third configuration,
the first configuration does not include a first CORESET pool index for the first CORESET, and
the second configuration includes a second CORESET pool index of a value 1 for the second CORESET.
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