US 12,267,613 B2
Signal processing device
Hideo Kobayashi, Tokyo (JP); Daisuke Yoshida, Kanagawa (JP); So Hasegawa, Kanagawa (JP); Yu Katase, Kanagawa (JP); and Hajime Hayami, Kanagawa (JP)
Assigned to CANON KABUSHIKI KAISHA, Tokyo (JP)
Filed by CANON KABUSHIKI KAISHA, Tokyo (JP)
Filed on Mar. 25, 2022, as Appl. No. 17/704,221.
Claims priority of application No. 2021-062604 (JP), filed on Apr. 1, 2021.
Prior Publication US 2022/0321820 A1, Oct. 6, 2022
Int. Cl. H04N 25/79 (2023.01); G06T 7/50 (2017.01)
CPC H04N 25/79 (2023.01) [G06T 7/50 (2017.01)] 23 Claims
OG exemplary drawing
 
1. A signal processing device comprising:
a first substrate;
a signal generation circuit arranged in the first substrate and configured to generate a reference signal to be used for comparison with a signal output from a pixel;
a circuit element arranged in the first substrate and different from the signal generation circuit;
a first semiconductor region arranged in the first substrate;
a plurality of first wirings each of which extends along a first direction;
a plurality of second wirings each of which extends along a second direction which intersects the first direction; and
a contact region in which a plurality of contacts are arranged,
wherein one of the plurality of second wirings is connected to the plurality of first wirings,
wherein in a plan view with respect to the first substrate, the contact region is arranged between the signal generation circuit and the circuit element, and
wherein a bottom of each of the plurality of contacts is in contact with the first semiconductor region, and a top of each of the plurality of contacts is in contact with a first wiring of the plurality of first wirings.