US 12,267,610 B2
Imaging device
Keita Ito, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Appl. No. 17/996,439
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Mar. 25, 2021, PCT No. PCT/JP2021/012519
§ 371(c)(1), (2) Date Oct. 18, 2022,
PCT Pub. No. WO2021/220682, PCT Pub. Date Nov. 4, 2021.
Claims priority of application No. 2020-079694 (JP), filed on Apr. 28, 2020.
Prior Publication US 2023/0217135 A1, Jul. 6, 2023
Int. Cl. H04N 25/772 (2023.01); H04N 25/78 (2023.01); H04N 25/79 (2023.01)
CPC H04N 25/772 (2023.01) [H04N 25/78 (2023.01); H04N 25/79 (2023.01)] 13 Claims
OG exemplary drawing
 
1. An imaging device, comprising:
a plurality of pixel circuits, wherein each pixel circuit of the plurality of pixel circuits comprises:
a light-receiving circuit configured to generate a pixel signal corresponding to an amount of received light,
a comparator configured to generate a first comparison signal by comparison between the pixel signal and a reference signal having a ramp waveform,
a delay circuit configured to generate a second comparison signal by delay of the first comparison signal,
a selection circuit configured to:
select one of the first comparison signal and the second comparison signal; and
output a selected signal as a third comparison signal, and
a latch circuit configured to latch a time code at a timing based on the third comparison signal; and
a controller configured to control an operation of the selection circuit in each pixel circuit of the plurality of pixel circuits, wherein
the plurality of pixel circuits includes a plurality of first pixel circuits and a plurality of second pixel circuits, and
in a first period, the controller is configured to:
cause the selection circuit in each of the plurality of first pixel circuits to select the first comparison signal; and
cause the selection circuit in each of the plurality of second pixel circuits to select the second comparison signal.