US 12,267,609 B2
Solid-state imaging device
Takanori Yagami, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 18/247,544
Filed by Sony Semiconductor Solutions Corporation, Kanagawa (JP)
PCT Filed Sep. 30, 2021, PCT No. PCT/JP2021/036233
§ 371(c)(1), (2) Date Mar. 31, 2023,
PCT Pub. No. WO2022/075190, PCT Pub. Date Apr. 14, 2022.
Claims priority of application No. 2020-170655 (JP), filed on Oct. 8, 2020.
Prior Publication US 2023/0379600 A1, Nov. 23, 2023
Int. Cl. H04N 25/77 (2023.01); H04N 25/709 (2023.01); H04N 25/76 (2023.01); H04N 25/79 (2023.01)
CPC H04N 25/77 (2023.01) [H04N 25/709 (2023.01); H04N 25/7795 (2023.01); H04N 25/79 (2023.01)] 16 Claims
OG exemplary drawing
 
1. A solid-state imaging device, comprising:
a floating diffusion that accumulates charge generated by photoelectric conversion according to an amount of received light of a pixel;
a comparison circuit that compares a voltage corresponding to accumulated charge of the floating diffusion with a reference voltage; and
a boosting circuit that raises a potential on a first end side of the floating diffusion during photoelectric conversion, the boosting circuit including a first transistor that controls a current flowing through the comparison circuit in such a manner that the potential on the first end side of the floating diffusion becomes high;
a current source that generates a current flowing through the comparison circuit, wherein the first transistor controls a current generated by the current source; and
a second transistor cascode-connected to the first transistor, wherein
the current source controls a current flowing through the comparison circuit according to a current flowing through the second transistor.