| CPC H04N 19/52 (2014.11) [H04N 19/122 (2014.11); H04N 19/124 (2014.11); H04N 19/176 (2014.11); H04N 19/44 (2014.11)] | 5 Claims |

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1. A decoder comprising:
circuitry; and
memory,
wherein, using the memory, the circuitry:
inverse quantizes quantized coefficients of a current block;
performs, depending on a size of the current block, either (i) an inverse secondary transform on a part of a result of the inverse quantization and an inverse primary transform on a result of the inverse secondary transform and another part of the result of the inverse quantization, or (ii) the inverse secondary transform on the result of the inverse quantization and the inverse primary transform on the result of the inverse secondary transform, the inverse secondary transform being performed using an inverse secondary transform basis selected from among inverse secondary transform basis candidates; and
derives an image based on a residual signal derived from a result of the inverse primary transform.
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