US 12,267,087 B2
Method for generating burst error correction code, device for generating burst error correction code, and recording medium storing instructions to perform method for generating burst error correction code
Sang-Hyo Kim, Suwon-si (KR); Dong Geun Lee, Suwon-si (KR); Jungrae Kim, Suwon-si (KR); Seokin Hong, Suwon-si (KR); and DongHyun Kong, Suwon-si (KR)
Assigned to Research & Business Foundation Sungkyunkwan University, Suwon-si (KR)
Filed by Research & Business Foundation SUNGKYUNKWAN UNIVERSITY, Suwon-si (KR)
Filed on Dec. 29, 2022, as Appl. No. 18/090,632.
Claims priority of application No. 10-2021-0192961 (KR), filed on Dec. 30, 2021.
Prior Publication US 2023/0216525 A1, Jul. 6, 2023
Int. Cl. H03M 13/00 (2006.01); H03M 13/09 (2006.01); H03M 13/17 (2006.01); H03M 13/27 (2006.01)
CPC H03M 13/17 (2013.01) [H03M 13/098 (2013.01); H03M 13/2735 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for generating a burst error correction code, the method comprising:
controlling a control unit to set a mother code in a memory, wherein the mother code corresponds to a PCM (parity check matrix) and is provided with a Hamming code using an attribute of a cyclic code;
controlling the control unit to determine different syndrome sets corresponding to each burst error pattern for at least two burst error patterns to be corrected based on the mother code;
controlling the control unit to shorten the mother code by shortening a column of the PCM of the mother code so that the defined syndrome sets are disjoint sets, wherein the PCM discriminates whether a vector to be checked is a codeword; and
controlling the control unit to generate the burst error correction code for each burst error pattern based on an optimal generator polynomial providing a longest code length within a range of a length of a parity of the mother code or a syndrome vector included in the syndrome sets that are disjoint sets.