US 12,267,077 B2
DLL circuit, time difference amplifier circuit, and distance-measuring imaging device
Takumi Kato, Osaka (JP); Kazuo Matsukawa, Osaka (JP); and Toshiaki Ozeki, Osaka (JP)
Assigned to NUVOTON TECHNOLOGY CORPORATION JAPAN, Kyoto (JP)
Filed by NUVOTON TECHNOLOGY CORPORATION JAPAN, Kyoto (JP)
Filed on Jun. 11, 2021, as Appl. No. 17/345,445.
Application 17/345,445 is a continuation of application No. PCT/JP2019/049308, filed on Dec. 17, 2019.
Claims priority of application No. 2018-236306 (JP), filed on Dec. 18, 2018.
Prior Publication US 2021/0344347 A1, Nov. 4, 2021
Int. Cl. H03L 7/081 (2006.01); G01S 17/894 (2020.01); H03K 5/24 (2006.01)
CPC H03L 7/0812 (2013.01) [G01S 17/894 (2020.01)] 14 Claims
OG exemplary drawing
 
1. A delay-locked loop (DLL) circuit, comprising:
a time difference amplifier circuit that includes a plurality of current sources for setting a time difference amplification factor and an input time difference range, the time difference amplifier circuit amplifying, to a first signal and a second signal which are input, a time difference between an edge that is a change point of a logic level included in the first signal and an edge that is a change point of a logic level included in the second signal, using the plurality of current sources and outputting a first amplified signal and a second amplified signal obtained;
a phase comparison circuit that calculates a phase difference between the first amplified signal and the second amplified signal output from the time difference amplifier circuit and outputs a phase difference signal indicating the phase difference calculated; and
a variable delay circuit that delays the second signal by an amount of delay depending on the phase difference indicated by the phase difference signal output from the phase comparison circuit and outputs a delayed signal obtained by delaying the second signal.