| CPC H03K 3/017 (2013.01) [H03K 19/20 (2013.01); H04R 3/00 (2013.01); H04R 29/001 (2013.01); H03K 3/037 (2013.01)] | 14 Claims |

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1. An electronic device, comprising:
a first sampling circuit, being configured to sample a pulse width of a first input pulse of a pulse-width modulated (PWM) input signal since a first time point on a first half of a first pulse period of a clock signal; and
a first summing circuit coupled with the first sampling circuit, being configured to generate a first output pulse of a PWM output signal since a second time point on a second half of the first pulse period, wherein a pulse width of the first output pulse is a summation of the pulse width of the first input pulse and a pulse width of a second input pulse of the PWM input signal, and the second input pulse is a next pulse after the first input pulse.
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