US 12,267,071 B2
Desaturation circuit having temperature compensation
John Horan, Cork (IE); and Paddy Collins, Cork (IE)
Assigned to Allegro MicroSystems, LLC, Manchester, NH (US)
Filed by Allegro MicroSystems, LLC, Manchester, NH (US)
Filed on Jun. 1, 2023, as Appl. No. 18/327,292.
Prior Publication US 2024/0405756 A1, Dec. 5, 2024
Int. Cl. H03K 3/011 (2006.01); H03K 17/687 (2006.01)
CPC H03K 3/011 (2013.01) [H03K 17/687 (2013.01)] 29 Claims
OG exemplary drawing
 
1. A system, comprising:
a desaturation circuit configured to generate a temperature-compensated voltage desaturation threshold voltage for a transistor, wherein the desaturation circuit comprises:
a proportional to absolute temperature (PTAT) circuit having a bandgap circuit, wherein the PTAT circuit has an output;
a complementary to absolute temperature (CTAT) circuit having an output; and
a combiner circuit to combine the output of the CTAT circuit and the output of the PTAT circuit to generate the temperature-compensated voltage desaturation threshold voltage.