US 12,267,067 B2
Transceiver circuit, and chip and terminal device that use transceiver circuit
Furong Xiong, Shanghai (CN); Kai Li, Shenzhen (CN); and Wei Song, Shenzhen (CN)
Assigned to HUAWEI TECHNOLOGIES CO., LTD., Shenzhen (CN)
Filed by Huawei Technologies Co., Ltd., Shenzhen (CN)
Filed on Oct. 24, 2023, as Appl. No. 18/493,098.
Application 18/493,098 is a continuation of application No. 17/563,721, filed on Dec. 28, 2021, granted, now 11,831,304.
Application 17/563,721 is a continuation of application No. PCT/CN2019/093868, filed on Jun. 28, 2019.
Prior Publication US 2024/0072789 A1, Feb. 29, 2024
Int. Cl. H03K 17/16 (2006.01); H04B 1/40 (2015.01); H03F 3/45 (2006.01)
CPC H03K 17/16 (2013.01) [H04B 1/40 (2013.01); H03F 3/45475 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A transceiver circuit, comprising:
a first interface configured to connect to an optical transceiver device;
a second interface configured to connect to the optical transceiver device;
a receiver circuit connected to the first interface and the second interface, wherein the receiver circuit comprises a differential amplifier including a first phase input terminal coupled to the first interface and a second phase input terminal coupled to the second interface;
a transmitter circuit connected to the first interface and the second interface, wherein the transmitter circuit comprises a first transistor including a first primary terminal coupled to the second phase input terminal and a first secondary terminal configured to couple to a first ground terminal; and
a compensation circuit connected to the first interface and the second interface,
wherein the compensation circuit is configured to provide a compensation current for the second phase input terminal,
wherein the compensation circuit comprises a second transistor and a current mirror,
wherein the second transistor is coupled to a second ground terminal, and
wherein the current mirror is configured to:
receive a leakage current passing through the second transistor; and
output the compensation current to the second phase input terminal.