US 12,267,047 B2
Amplifier circuit, corresponding device and method
Alessandro Bertolini, Vermiglio (IT); and Germano Nicollini, Piacenza (IT)
Assigned to STMicroelectronics S.r.l., Agrate Brianza (MB) (IT)
Filed by STMicroelectronics S.r.l., Agrate Brianza (IT)
Filed on Apr. 14, 2022, as Appl. No. 17/720,502.
Claims priority of application No. 102021000009653 (IT), filed on Apr. 16, 2021.
Prior Publication US 2022/0337198 A1, Oct. 20, 2022
Int. Cl. H03F 1/30 (2006.01); H03F 3/04 (2006.01)
CPC H03F 1/301 (2013.01) [H03F 3/04 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A circuit, comprising:
a first gain stage having a differential input transistor pair comprising a first transistor with a control node and a current flow path and a second transistor with a control node and a current flow path, and having a bias current source coupled to the current flow path of the first transistor and the current flow path of the second transistor, wherein the control node of the first transistor and the control node of the second transistor are configured to have an input signal applied therebetween, and wherein the second transistor is located between the bias current source and a coupling node in the current flow path through the second transistor;
a second gain stage having an output node configured to be coupled to a load and to apply thereto an output voltage which is a function of the input signal applied between the control nodes of the first transistor and the second transistor, wherein the second gain stage comprises a further current flow path through at least one further transistor;
a coupling network configured to couple the coupling node in the first gain stage to the output node in the second gain stage;
a feedback line coupling the output node in the second gain stage to the control node of the first transistor in the first gain stage;
current mirror circuitry coupled to said further current flow path through the at least one further transistor in the second gain stage, the current mirror circuitry comprising a current mirror flow line between a supply line and ground with a sensing node in the current mirror flow line configured to produce a sensing signal which is indicative of the current supplied to the load at the output node; and
a coupling line directly connecting the sensing signal produced at the sensing node in the current mirror flow line in the second gain stage in feed back to the control node of the first transistor in the first gain stage.