US 12,267,006 B2
Forming integrated electronic devices for converting and downscaling alternating current
Yen-Ku Lin, Zhubei (TW); Ru-Yi Su, Kouhu Township (TW); Haw-Yun Wu, Zhubei (TW); and Chun-Lin Tsai, Hsin-Chu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jun. 13, 2022, as Appl. No. 17/806,670.
Prior Publication US 2023/0402937 A1, Dec. 14, 2023
Int. Cl. H02M 3/00 (2006.01); H01L 25/07 (2006.01); H02M 1/00 (2007.01); H02M 1/42 (2007.01); H02M 3/335 (2006.01); H02M 7/00 (2006.01); H02M 7/219 (2006.01)
CPC H02M 3/003 (2021.05) [H01L 25/074 (2013.01); H02M 1/007 (2021.05); H02M 1/4233 (2013.01); H02M 3/01 (2021.05); H02M 3/33571 (2021.05); H02M 7/003 (2013.01); H02M 7/219 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a first gate over a first substrate for driving a first drain associated with a full-bridge device for converting alternating current to direct current;
forming a second gate over a second substrate for driving a second drain associated with an inductor-inductor-capacitor (LLC) device for reducing a voltage of the direct current;
stacking and bonding the second substrate and the first substrate together to form an integrated device; and
forming a plurality of redistribution layers (RDLs) connected to the first drain, the second drain, and sources associated with the first drain and the second drain.