US 12,266,902 B2
Vertical-cavity surface-emitting laser array with integrated capacitor
Siu Kwan Cheung, San Jose, CA (US); Matthew Glenn Peters, Menlo Park, CA (US); Mohammad Ali Shirazi Hosseini Dokht, Milpitas, CA (US); Hao Huang, San Jose, CA (US); and Lijun Zhu, Dublin, CA (US)
Assigned to Lumentum Operations LLC, San Jose, CA (US)
Filed by Lumentum Operations LLC, San Jose, CA (US)
Filed on Jun. 30, 2021, as Appl. No. 17/305,140.
Claims priority of provisional application 63/131,185, filed on Dec. 28, 2020.
Prior Publication US 2022/0209500 A1, Jun. 30, 2022
Int. Cl. H01S 5/026 (2006.01); H01S 5/042 (2006.01); H01S 5/183 (2006.01); H01S 5/42 (2006.01)
CPC H01S 5/0261 (2013.01) [H01S 5/04256 (2019.08); H01S 5/0428 (2013.01); H01S 5/423 (2013.01); H01S 5/18311 (2013.01); H01S 2301/176 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An optical chip, comprising:
a substrate;
a vertical-cavity surface-emitting laser (VCSEL) structure, the VCSEL structure including:
a first electrode over a first portion of an active layer of the VCSEL structure, and
a second electrode below the substrate;
an isolation region in the substrate; and
a capacitor on the isolation region and over at least a second portion of the active layer of the VCSEL structure that is outside of an active region, the capacitor including:
a first metal layer directly on the isolation region,
a dielectric layer on the first metal layer, and
a second metal layer on the dielectric layer and over the second portion of the active layer,
wherein the isolation region is configured to provide isolation between the capacitor and the substrate.