US 12,266,704 B2
Semiconductor devices including horizontal gate-all-around (hGAA) nanostructure transistors and methods of forming
Shi Ning Ju, Hsinchu (TW); Guan-Lin Chen, Baoshan Township (TW); Kuo-Cheng Chiang, Zhubei (TW); and Chih-Hao Wang, Baoshan Township (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on May 26, 2023, as Appl. No. 18/324,682.
Application 18/324,682 is a continuation of application No. 17/712,605, filed on Apr. 4, 2022, granted, now 11,699,729.
Application 17/712,605 is a continuation of application No. 16/871,993, filed on May 11, 2020, granted, now 11,296,199, issued on Apr. 5, 2022.
Claims priority of provisional application 62/927,531, filed on Oct. 29, 2019.
Prior Publication US 2023/0299159 A1, Sep. 21, 2023
Int. Cl. H01L 29/417 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/41791 (2013.01) [H01L 21/823431 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 2029/7858 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
depositing a plurality of first layers and a plurality of second layers over a semiconductor substrate, wherein the plurality of first layers alternate with the plurality of second layers, and a material of the plurality of first layers is different from a material of the second plurality of layers;
patterning the plurality of first layers, the plurality of second layers, and the semiconductor substrate into a fin, the fin comprising:
a first portion of the fin having a first L-shaped active region in a top-down view; and
a second portion of the fin having a second L-shaped active region in the top-down view;
forming a first gate electrode over the first L-shaped active region; and
forming a second gate electrode over the second L-shaped active region.