| CPC H01L 29/41733 (2013.01) [H01L 21/823418 (2013.01); H01L 21/823475 (2013.01); H01L 27/088 (2013.01); H01L 29/0665 (2013.01); H01L 29/41775 (2013.01); H01L 29/42392 (2013.01); H01L 29/66742 (2013.01); H01L 29/78618 (2013.01)] | 20 Claims |

|
1. A semiconductor device structure, comprising:
a stack of semiconductor nanostructures over a base structure;
a first epitaxial structure and a second epitaxial structure sandwiching the stack of semiconductor nanostructures;
a gate stack wrapped around each of the stack of semiconductor nanostructures;
a backside conductive contact connected to the second epitaxial structure, wherein a first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure; and
an insulating spacer between a sidewall of the base structure and the backside conductive contact.
|