US 12,266,699 B2
Quantum dot array devices with shared gates
Hubert C. George, Portland, OR (US); Ravi Pillarisetty, Portland, OR (US); Jeanette M. Roberts, North Plains, OR (US); Nicole K. Thomas, Portland, OR (US); and James S. Clarke, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jul. 6, 2021, as Appl. No. 17/368,427.
Application 17/368,427 is a continuation of application No. 16/328,615, granted, now 11,101,352, previously published as PCT/US2016/053609, filed on Sep. 24, 2016.
Prior Publication US 2021/0343845 A1, Nov. 4, 2021
Int. Cl. H01L 29/40 (2006.01); H01L 29/12 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/76 (2006.01); B82Y 10/00 (2011.01); B82Y 40/00 (2011.01); H01L 23/532 (2006.01)
CPC H01L 29/401 (2013.01) [H01L 29/122 (2013.01); H01L 29/42376 (2013.01); H01L 29/66977 (2013.01); H01L 29/7613 (2013.01); B82Y 10/00 (2013.01); B82Y 40/00 (2013.01); H01L 23/53285 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A quantum dot device, comprising:
a first quantum well stack having a shape of a first fin, wherein the first fin includes a first doped region and a second doped region;
a second quantum well stack having a shape of a second fin, the second fin being parallel to the first fin;
an insulating material between the first fin and the second fin; and
a gate that extends over the first fin and the second fin, wherein the gate is one of a plurality of gates that extend over the first fin and the second fin, and the plurality of gates extend over a portion of the first fin that is between the first doped region and the second doped region.