US 12,266,633 B2
Semiconductor structure and method of forming the same
Chih-Chien Pan, Taipei (TW); Pu Wang, Hsinchu (TW); Li-Hui Cheng, New Taipei (TW); An-Jhih Su, Taoyuan (TW); and Szu-Wei Lu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 12, 2023, as Appl. No. 18/351,478.
Application 18/351,478 is a continuation of application No. 17/242,286, filed on Apr. 27, 2021, granted, now 11,742,323.
Prior Publication US 2023/0378130 A1, Nov. 23, 2023
Int. Cl. H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01)
CPC H01L 25/0652 (2013.01) [H01L 23/3135 (2013.01); H01L 23/49816 (2013.01); H01L 24/27 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/48 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/33517 (2013.01); H01L 2224/33519 (2013.01); H01L 2224/48225 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a first semiconductor package comprising a plurality of dies laterally disposed side by side;
a second semiconductor package disposed over and corresponding to a first one of the plurality of dies;
a heat spreader disposed over and corresponding to a second one of the plurality of dies; and
a dielectric layer disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.