CPC H01L 24/06 (2013.01) [H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 2224/06517 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01)] | 9 Claims |
1. A method of manufacturing a semiconductor structure, comprising:
providing a first semiconductor substrate;
forming a first conductive pad over the first semiconductor substrate;
forming a first hybrid bonding pad on the first conductive pad, wherein the first hybrid bonding pad comprises nano-twins copper, and a thickness of the first hybrid bonding pad is less than a thickness of the first conductive pad;
providing a second semiconductor substrate;
forming a second conductive pad over the second semiconductor substrate; and
forming a second hybrid bonding pad on the second conductive pad, wherein the second hybrid bonding pad comprises nano-twins copper.
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