US 12,266,603 B2
Semiconductor device to reduce signal loss in a transmission line
Pablo Jesús Gardella, Heidelberg (DE); Eduardo Mariani, Ciudad Autonoma de Buenos Aires (AR); and Brenda Rossi, Pilar (AR)
Assigned to Allegro MicroSystems, LLC, Manchester, NH (US)
Filed by Allegro MicroSystems, LLC, Manchester, NH (US)
Filed on May 3, 2022, as Appl. No. 17/661,763.
Prior Publication US 2023/0361020 A1, Nov. 9, 2023
Int. Cl. H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 23/552 (2006.01); H01L 23/66 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 23/528 (2013.01); H01L 23/53257 (2013.01); H01L 23/552 (2013.01); H01L 23/66 (2013.01); H01L 2223/6616 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an epitaxial layer having a first-type dopant;
a first well having a second-type dopant;
a base layer having the second-type dopant, the base layer formed within the epitaxial layer and in contact with the first well;
a first metal layer comprising a first base terminal and an inner conductor;
a first via connecting the first base terminal to the first well;
an isolation layer on the epitaxial layer;
a polysilicon region on the isolation layer; and
a second via connecting the first base terminal to the polysilicon region,
wherein at least one dielectric separates the inner conductor from the first base terminal, and the base layer.