CPC H01L 21/76895 (2013.01) [H01L 21/76805 (2013.01); H01L 21/76829 (2013.01); H01L 23/535 (2013.01); H10B 41/27 (2023.02); H10B 43/27 (2023.02)] | 12 Claims |
1. A memory array comprising strings of memory cells, comprising:
laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers, channel-material strings of memory cells extending through the insulative tiers and the conductive tiers; and
through-array-vias (TAVs) extending through the insulative tiers and the conductive tiers to be directly against conductor material of islands, the islands comprising multiple different composition materials directly above the conductor material; apart from the TAVs, the islands individually comprising at least one of (a), (b), or (c), where:
(a): a top material that is of different composition from all material that is vertically between the top material and the conductor material;
(b): the top material having its top surface in a vertical cross-section extending laterally-outward beyond two opposing laterally-outermost edges of a top surface of the material that is immediately directly below the top material; and
(c): is of different composition from that of an upper portion of the conductor material and including a portion thereof that is elevationally coincident with the conductor material or that is directly against the conductor material.
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