| CPC H01L 21/7682 (2013.01) [H01L 21/76877 (2013.01); H01L 21/76897 (2013.01); H01L 23/5226 (2013.01); H10B 12/0335 (2023.02)] | 10 Claims |
|
1. A semiconductor device, comprising:
a device layer comprising a semiconductor element;
a first dielectric layer on the device layer;
a first conductive line on the device layer and surrounded by the first dielectric layer;
a second dielectric layer on the first dielectric layer and around the first conductive line, wherein an upper surface of the second dielectric layer is higher than an upper surface of the first conductive line;
a spacer disposed on the first conductive line and abutting a sidewall of the second dielectric layer; and
a first conductive via disposed on the first conductive line and the spacer and in contact with a top surface of the second dielectric layer, wherein the spacer is disposed between the first conductive via and the first conductive line, and disposed between the second dielectric layer and the first conductive via, and the first conductive via comprises:
a first segment positioned over the spacer and including a first width; and
a second segment positioned between the first segment and the first conductive line and including a second width, wherein the first width is larger than the second width.
|