US 12,266,543 B2
Semiconductor device structure having gate dielectric layer
I-Ming Chang, ShinChu (TW); Chih-Cheng Lin, Taipei (TW); Chi-Ying Wu, Hsinchu (TW); Wei-Ming You, Taipei (TW); Ziwei Fang, Hsinchu (TW); and Huang-Lin Chao, Oregon, OR (US)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 24, 2021, as Appl. No. 17/327,958.
Application 17/327,958 is a continuation of application No. 16/035,159, filed on Jul. 13, 2018, granted, now 11,018,022.
Prior Publication US 2021/0280432 A1, Sep. 9, 2021
Int. Cl. H01L 21/335 (2006.01); H01L 21/28 (2006.01); H01L 21/322 (2006.01); H01L 21/762 (2006.01); H01L 21/8232 (2006.01); H01L 29/165 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 21/3221 (2013.01) [H01L 21/28176 (2013.01); H01L 21/28185 (2013.01); H01L 21/28202 (2013.01); H01L 21/76224 (2013.01); H01L 29/165 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01); H01L 29/7851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device structure, comprising:
a substrate having a base portion and a fin portion over the base portion;
an isolation layer over the base portion and surrounding the fin portion; and
a metal gate stack over the isolation layer and wrapping around an upper part of the fin portion, wherein the metal gate stack comprises a gate dielectric layer and a metal gate electrode layer over the gate dielectric layer, the gate dielectric layer comprises fluorine,
a first part of the isolation layer is not covered by the metal gate stack, the first part comprises fluorine, and a first concentration of fluorine in the first part increases toward a first top surface of the first part.