US 12,266,520 B2
Method for manufacturing epitaxial wafer, silicon-based substrate for epitaxial growth, and epitaxial wafer
Keitarou Tsuchiya, Takasaki (JP); Kazunori Hagimoto, Takasaki (JP); and Masaru Shinomiya, Annaka (JP)
Assigned to SHIN-ETSU HANDOTAI CO., LTD., Tokyo (JP)
Appl. No. 17/278,396
Filed by SHIN-ETSU HANDOTAI CO., LTD., Tokyo (JP)
PCT Filed Sep. 6, 2019, PCT No. PCT/JP2019/035118
§ 371(c)(1), (2) Date Mar. 22, 2021,
PCT Pub. No. WO2020/066544, PCT Pub. Date Apr. 2, 2020.
Claims priority of application No. 2018-180177 (JP), filed on Sep. 26, 2018.
Prior Publication US 2021/0358738 A1, Nov. 18, 2021
Int. Cl. H01L 21/02 (2006.01)
CPC H01L 21/02021 (2013.01) [H01L 21/02381 (2013.01); H01L 21/0254 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A method for manufacturing an epitaxial wafer comprising the steps of:
preparing a silicon-based substrate having a chamfered portion in a peripheral portion;
forming an annular trench in the chamfered portion of the silicon-based substrate along an internal periphery of the chamfered portion; and
performing an epitaxial growth on the silicon-based substrate having the trench formed,
wherein in a diametrical direction of the silicon-based substrate, 10 to 100/mm of the trench are formed.