US 12,266,473 B2
Chip electronic component
Yukihiro Fujita, Nagaokakyo (JP); Shogo Kanbe, Nagaokakyo (JP); Kosuke Nakano, Nagaokakyo (JP); and Hideki Otsuka, Nagaokakyo (JP)
Assigned to MURATA MANUFACTURING CO., LTD., Kyoto (JP)
Filed by Murata Manufacturing Co., Ltd., Nagaokakyo (JP)
Filed on May 10, 2023, as Appl. No. 18/195,426.
Application 18/195,426 is a continuation of application No. 17/137,498, filed on Dec. 30, 2020, granted, now 11,688,555.
Application 17/137,498 is a continuation of application No. 16/427,551, filed on May 31, 2019, granted, now 10,971,301, issued on Apr. 6, 2021.
Application 16/427,551 is a continuation of application No. PCT/JP2017/043063, filed on Nov. 30, 2017.
Claims priority of application No. 2016-233717 (JP), filed on Dec. 1, 2016.
Prior Publication US 2023/0274881 A1, Aug. 31, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01G 2/06 (2006.01); H01G 4/232 (2006.01); H01G 4/30 (2006.01); H01G 4/12 (2006.01); H01G 4/252 (2006.01)
CPC H01G 2/065 (2013.01) [H01G 4/232 (2013.01); H01G 4/30 (2013.01); H01G 4/12 (2013.01); H01G 4/252 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A chip electronic component comprising:
a chip component body including a mounting surface facing a mounting board;
at least two outer electrodes disposed on outer surfaces of the component body; and
at least two spacers respectively electrically connected to the at least two outer electrodes; wherein
each of the at least two spacers have a predetermined thickness direction dimension on the mounting surface in a direction perpendicular or substantially perpendicular to the mounting surface; and
each of the at least two spacers contains Cu—Ni alloy, and a simple Sn metal.