| CPC G11C 16/102 (2013.01) [G11C 16/08 (2013.01); G11C 16/16 (2013.01)] | 20 Claims |

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1. A method for programming a memory, the memory comprising at least a target word line and a first word line group and a second word line group stacked on both sides of the target word line, respectively, the first word line group comprising first word lines, the second word line group comprising second word lines, the method comprising:
applying a first bias voltage signal to the first word lines, applying a second bias voltage signal to the target word line, and applying a third bias voltage signal to the second word lines, during a pre-charge operation; and,
applying a program voltage signal to the target word line during a programming operation, wherein the programming operation comprises a first sub-programming operation and a second sub-programming operation, the memory further comprises memory cells, the first word line group comprising a first adjacent word line adjacent to the target word line, the second word line group comprising a second adjacent word line adjacent to the target word line, and the method further comprises:
performing the first sub-programming operation on the memory cells coupled to the first adjacent word line;
performing the pre-charge operation, the first bias voltage signal, the second bias voltage signal, and the third bias voltage signal having a first set of set values;
performing the first sub-programming operation on the memory cells coupled to the target word line;
performing the first sub-programming operation on the memory cells coupled to the second adjacent word line;
performing the pre-charge operation, the first bias voltage signal, the second bias voltage signal, and the third bias voltage signal having a second set of set values; and,
performing the second sub-programming operation on the memory cells coupled to the target word line, the first set of set values being different from the second set of set values.
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