US 12,266,399 B2
Write operation assist circuit
Yiqi She, Shanghai (CN)
Assigned to SPREADTRUM COMMUNICATIONS (SHANGHAI) CO., LTD., Shanghai (CN)
Appl. No. 17/790,281
Filed by SPREADTRUM COMMUNICATIONS (SHANGHAI) CO., LTD., Shanghai (CN)
PCT Filed Nov. 19, 2020, PCT No. PCT/CN2020/130038
§ 371(c)(1), (2) Date Jul. 6, 2022,
PCT Pub. No. WO2021/135706, PCT Pub. Date Jul. 8, 2021.
Claims priority of application No. 201911417706.7 (CN), filed on Dec. 31, 2019.
Prior Publication US 2022/0358997 A1, Nov. 10, 2022
Int. Cl. G11C 11/40 (2006.01); G11C 11/4076 (2006.01); G11C 11/4094 (2006.01); G11C 11/4096 (2006.01)
CPC G11C 11/4096 (2013.01) [G11C 11/4076 (2013.01); G11C 11/4094 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A write operation assist circuit, comprising a pre-charging circuit, a drive signal circuit, a programmable delay circuit, a charge pump, a write driving circuit and a column selector,
wherein the pre-charging circuit has a pre-charging signal output terminal coupled to a pre-charging signal input terminal of the drive signal circuit, a first voltage output terminal coupled to a first bit line, and a second voltage output terminal coupled to a second bit line,
the driving signal circuit has a first input terminal coupled to the first bit line, a second input terminal coupled to the second bit line, a first output terminal coupled to a, first input terminal of the programmable delay circuit, and a second output terminal coupled to a second input terminal of the programmable delay circuit,
the programmable delay circuit has an output terminal coupled to a first terminal of the charge pump,
the charge pump has a second terminal coupled to a ground terminal of the write driving circuit,
the write driving circuit has a first input terminal which is input with a first level, a second input terminal which is input with a second level, a first output terminal coupled to a first input terminal of the column selector, and a second output terminal coupled to a second input terminal of the column selector, wherein the first level is inverse to the second level; and
the column selector has a first output terminal coupled to the first bit line, and a second output terminal coupled to the second bit line.